1. Technical Field
The present invention described herein relates to a semiconductor integrated circuit (IC) and, more particularly, to an apparatus for outputting data of a semiconductor IC.
2. Related Art
In semiconductor integrated circuits, data are inputted and outputted by a plurality of data input/output pads.
At this time, data clock signals are used to synchronize data output by the plurality of data input/output pads.
Since the plurality of input/output pads are separated from one another at different distances with respect to the circuit layout, the data clock signals should be supplied to the plurality of input/output pads in some sort of manner as to accommodate these different distances.
Referring to an output data waveform of semiconductor integrated circuit according to a prior art shown in FIG. 1, distributed data clock signals ‘CLK0’ to ‘CLK3’ are used and phases of the data clock signals ‘CLK1’ and ‘CLK2’ are deviated from those of the data clock signals ‘CLK0’ and ‘CLK3’ in a data output mode (X32 MODE) in which 32-bit data are outputted through all 32 data input/output pads. In this case, output data ‘DATA OUT_X32’ also has output timings deviated from each other.
Therefore, development of a technology that can reduce a timing error between the plurality of data clock signals has been required in order to improve the reliability of the output data in the semiconductor integrated circuit.